Dr. Anuja Amlesh Askhedkar
Associate Professor
Dr. Anuja Amlesh Askhedkar


Dr. Anuja Askhekdar is an associate professor at MIT-WPU. She has 23 years of teaching experience.  She completed her B. E from Shivaji University in the year 1997 and her Masters from Pune University in the year 2003. She completed her Ph. D from PIET, Nagpur University in the year 2019. Her research interest includes VLSI Design, Digital CMOS Design, and Analog CMOS Design. She has published 15 research papers. She has received one patent grant for her research work.



Applied for 2 research grants - SERB POWER & SERB SURE



  1. Deepgandha Shete, Anuja Askhedkar, “Survey of Different Full Adder Circuits for Low Power Consumption,” International Journal of Industrial Electronics and Electrical Engineering, Vol. 7, Issue 9, pp. 35-36, Oct 2019, Pune, India
  2. Askhedkar, A., Agrawal, G. “Low Power, Low Area Digital Modulators using Gate Diffusion Input Technique,” Journal of King Saud University – Engineering Sciences (2017),, Production and Hosting by Elsevier
  3. Anuja Askhedkar and Dr. G.H. Agrawal, “Gate Diffusion Input Technique –Applications and Modifications: An Overview,” CiiT International Journal of Automation and Autonomous System, Vol.9, No.9, Nov-Dec 2019, pp. 186-189.
  4. Madhu Gudgunti, Prof. Mrs. A. A. Askhedkar, “Implementation of a 4-Bit Direct Charge Transfer Switched Capacitor DAC and DWA DEM technique”, International Journal on Recent and Innovation Trends in Computing and Communication ISSN: 2321-8169 Volume: 2 Issue: 6, pp.1679 – 1682, June 2014
  5. Deepgandha Shete and Anuja Askhedkar, Implementation and Analysis of Low Power Consumption Full Swing GDI Full Adders, Chapter no. 9, Advances in Signal and Data Processing Lecture in Electrical Engineering, Springer Nature Singapore Pte. Ltd 2021, pp. 119-133,, eBook ISBN 978-981-15-8391-9, Hardcover ISBN 978-981-15-8390-2, Series ISSN 1876-1100, Edition 1, Book Subtitle: Select Proceedings of ICSDP 2019

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